Technical Field
A conventional phased-array antenna enables a highly directive antenna beam to be steered toward a single certain direction. The direction of an antenna beam may be controlled by setting the phase shifts of each of the antenna elements in the array. However, to enable higher mobility, the phase shifts must be updated more quickly than conventionally practiced. In addition, cost and space considerations eliminate the obvious deployment of parallel data buses. Thus it can be appreciated that what is needed is a more efficient way of dissemination of the phase shift control information to a substantial number of phase shifters for an antenna array with a high number of antenna elements and possibly more than one simultaneous target.
Summary of the Invention
An efficient phase control scheme for a phased-array antenna consisting of a number of small submodules (subarrays) is disclosed. Each submodule (subarray) has a digital interface and contains a number of antenna elements and the associated phase shifters. The disclosed phase control scheme requires dissemination of minimum amount of phase control information to the submodules.
A serial bus is used to disseminate the phase shift control information. The serial bus has the advantages of simplicity and reduced volume, routing, and cost over a conventional parallel bus. This is especially true for a phased-array antenna with high number of antenna elements. Minimizing the distribution of information enables a substantially lower bus speed and cost.
An array of registers local to each antenna element of a phased-array antenna contains phase shifter and gain equalizer values. Receiving an address, position, or location within the register array from a directional beam controller determines a beam direction. These values can be preloaded and a specific set of phase shifter and gain equalizer values corresponding to a beam direction indicated by disseminating a pointer. Alternatively, a digital functional logic circuit for each antenna element can determine the required phase shift on the fly by receiving a phase increment broadcast to every antenna element.
An apparatus is configured to efficiently elaborate phase shift weights into a submodule of a phased-array antenna system. Each subarray phase control submodule is uniquely configured to receive and elaborate weights for a submodule of elements to control phase shifters. Major operators and minor operators are received and transformed by an apparatus coupled to a phased-array antenna suitable for a high mobility device. Each submodule determines its own base phase shift weight per its unique configuration. A recursive adder or multiplier applies phase increments to direct an antenna beam by controlling elements within an array subset.
A phased-array antenna panel is constructed from building blocks. These are a plurality of front end modules, mounted to a Printed Circuit Board (PCB). Each front end module has a plurality of antenna elements coupled to a frontend die. The frontend die is coupled to a phased-array processing die. The antenna elements are embedded in the top of a substrate and the frontend dies and the phased-array processing die are flip-chip mounted onto the bottom layer of substrate. Input or output signals are conducted through the substrate to the PCB. A customized and customizable Radio Frequency Integrated Circuit (RFIC) device includes: phased-array processing blocks; phase-shifters, combiners, splitters, gain equalizers, buffer amplifiers, and a digital signal control and interface circuit. Each digital signal control and interface circuit has at least one global/individual indicator pad and a plurality of individual die address setting pads enabling a first die address to be configured at a first location on the PCB which connects a plurality of die address pads to a first combination of logic high or logic low and a second die address to be configured at a second location on the PCB which connects a plurality of die address pads to a second combination of logic high or logic low whereby registers within the RFIC are assigned unique addresses.
Tying the front end modules together is a PCB comprising a data and address bus; a plurality of die address pads; and a global die selection pad and a transfer format mode pad.
A register array in each RFIC is grouped into a local register group and a global register group, the local registers physically placed close in proximity to RF chains which each correspond to an element of array antenna, whereby each set of local registers control an individual antenna element and a global register controlling overall RFIC function.
The system provides several choices for configuring the antenna array. A lookup method determines antenna element phase and gain settings from storage and a computation method determines antenna element phase and gain settings. They may be used separately or combined for corner cases.
The method of operation for the apparatus includes several alternatives explicated below for controlling slave RFIC devices in an antenna array.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the detailed disclosure below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.